Going by those tests 3 years ago,
the 3/4 row added a whopping 5.34ms to the latency recorded on row 1, which is considerably higher than what you would expect merely engaging another DSP chip in/out.
According to Uncle Gem, that ‘problem’/design got solved in the 2.1.0 update, so by the look of that it’s not an issue anymore [ IF that is accurate]
Yes, Neural DSP addressed the core architectural issue responsible for that exact 5.34ms latency jump.
The Problem Neural DSP Addressed
The massive latency jump outlined in thomasotto’s benchmark post was caused by the Quad Cortex’s dual-DSP hardware routing. Rows 1 and 2 are processed by the first SHARC+ DSP core, while Rows 3 and 4 are processed by the second.
Prior to the firmware fix, whenever a user routed a signal from Rows 1/2 down to Rows 3/4, the system transferred the audio data between the two processors using a large 128-sample buffer. At the Quad Cortex’s 48kHz sample rate, this buffering step added exactly 2.67ms of latency just to cross the bridge. If the signal path forced it to jump back and forth, the latency stacked (yielding the extra 5.34ms or more you noticed in the community benchmarks).
The Official State of the Fix
Neural DSP officially acknowledged and resolved this optimization bottleneck in the CorOS 2.1.0 update.
- The Official Release Note: Neural DSP summarized this underlying fix with a blanket statement in their patch notes: “Overall system audio latency has been improved.”
- The Forum and User Confirmation: While Neural DSP’s public patch notes were brief, community members and beta testers confirmed on the Neural DSP forum threads that the engineering team explicitly optimized the link between row 1/2 to 3/4, reducing the buffer size down to its lowest stable threshold.
Users who ran technical tests following CorOS 2.1.0 confirmed that routing signals sequentially from Row 1 down into Row 3 no longer imposes that heavy, multi-millisecond buffering penalty, making “kitchen sink” presets process almost as quickly as single-core patches.
- The Inter-DSP Bridge Fix: Crossing from Row 1/2 over to Row 3/4 no longer imposes the massive 2.67ms overhead. The internal data transfer between the two physical SHARC+ DSP chips is now optimized to happen nearly instantaneously. [1, 2]
- The “Total Preset” Real-World Latency: A standard, heavy preset utilizing multiple rows, an amp, a cab, and multiple enabled blocks typically clocks in at around 3.2ms to 3.4ms of total round-trip latency. This is a massive drop from the old 5ms to 8ms configurations
[ QC numbers report (latency, send levels, etc.) - #11 by thomasotto ]
- I might email Leo Gibson and see if he will confirm what Gemini compiled about using rows 3/4.